HyperNIC: NIC-Level Co-Processors for Resilient Coded Networking and Computation

(HyperNIC: Netzwerkkarten-basierte Co-Prozessoren für robuste codierte Vernetzung und Informationsverarbeitung)

Team

Chair of Network Architectures and Services, TU Munich

  • Georg Carle
    Georg Carle is a professor at Technical University of Munich (TUM), holding the chair of Network Architectures and Services. In 1996, he completed his doctorate at the University of Karlsruhe’s Institute of Telematics. He was supported by a scholarship from the research training group on manageability of complex systems. In 1997, he received an EU scholarship for a postdoctoral position at Institut Eurécom at Sophia Antipolis, France. At the Fraunhofer Institute for Open Communication Systems (FOKUS) in Berlin, he headed the competence center ‘Global Networking’. In December 2002, he was appointed to the University of Tübingen’s newly created Chair of Computer Networks and Internet. He joined TUM in April 2008. His work addresses Internet technologies, security of networked systems, and resilient and dependable systems.

  • Sebastian Gallenmüller
    PostDoc

  • Kilian Holzinger
    PhD student

  • Henning Stubbe
    PhD student

  • Manuel Simon
    PhD student

  • Stefan Lachnit
    PhD student

Chair of Integrated Systems, TU Munich

  • Andreas Herkersdorf
    Andreas Herkersdorf is a professor and Head of Department of Computer Engineering at Technical University of Munich (TUM). He received a Dr. degree from ETH Zurich, Switzerland, in 1991. Between 1988 and 2003, he has been in technical and management positions with the IBM Research Laboratory in Rüschlikon, Switzerland. Since 2003, Dr. Herkersdorf is the Chair Professor of Integrated Systems at TUM. He is a senior member of the IEEE, member of National Academy of Science and Engineering (acatech) and serves as editor for Springer and De Gruyter journals for design automation and information technology. His research interests include application-specific multi-processor architectures, IP network processing, Network on Chip and self-adaptive fault-tolerant computing.

  • Thomas Wild
    PostDoc

  • William Wulff
    PhD student

  • Franz Biersack
    PhD student

Abstract

[EN] A crucial aspect for providing resilient time-sensitive services is the availability of resilience mechanisms and high packet processing performance at the right location, thereby avoiding overloaded network and host components. Hardware offloading by NIC-level (Network Interface Cards) co-processors enables resilient, low-latency computation and can help to free scarce and expensive CPU resources. In HyperNIC, we plan to investigate mechanisms and processing platforms that provide resilience efficiently and flexibly. We aim to design a novel class of NICs with processing capabilities that employ techniques such as network coding, low-latency packet retransmissions, and fault-tolerant algorithms.

[DE] Ein zentraler Aspekt bei der Erbringung robuster Dienste mit Echtzeitanforderungen ist die Verfügbarkeit von Fehlertoleranzmechanismen sowie Hochleistungs-Paketverarbeitung am richtigen Ort, um Überlast von Netzwerkkomponenten und Hostrechner zu vermeiden. Hardware-Offloading durch Coprozessoren auf der Ebene von Network Interface Cards (NICs) ermöglicht die erforderliche robuste Berechnung bei geringer Latenz und kann dazu beitragen, knappe und teure CPU-Ressourcen einzusparen. Das HyperNIC Projekt fokussiert sich auf Mechanismen und Ausführungsplattformen, die Robustheit effizient und flexibel bereitstellen. Im Projekts sollen mittels Techniken wie Netzwerkcodierung, Paketweiterleitung mit deterministischer und niedriger Latenz sowie fehlertoleranten Algorithmen eine neuartige Klasse von NICs mit hoher Verarbeitungsleistung entwickelt werden.